VLSI Architectures - Spring 2008

Course Syllabus

Course Objectives: The course will cover the most important methodologies for designing custom or semi-custom VLSI systems for some typical signal processing applications. General techniques covered include pipelining, retiming, folding and unfolding, and systolic array design. Mapping of algorithms on array structures, DSP systems, and Field Programmable Gate Arrays (FPGAs) will be described for selected algorithms.

Course prerequisites: ENEE 446 or equivalent and basic signal processing and graph-theoretic concepts.

Prerequisite topics: Logic Design, computer architecture, VLSI design, and basic concepts in digital signal processing algorithms, graph theory, and combinatorial algorithms.

Textbook: VLSI Digital Signal Processing Systems, Design and Implementation, Keshab K. Parhi, John Wiley, 1999.

Core Topics:

1. Introduction

• Typical Signal Processing Algorithms
• Overview of VLSI Architectures
• Representations of DSP Algorithms

2. General Techniques

• Iteration Bound
• Pipelining
• Parallel Processing

3. Retiming Techniques

• Definitions and Properties
• General Methodology

4. Unfolding and Folding Techniques

• Unfolding Algorithm
• Critical Path, Unfolding, and Retiming
• Folding Transformation
• Register Minimization

5. Systolic Architectures

• Overview
• Design Methodology
• Matrix Operations and 2D Systolic Array Design

6. Mapping Algorithms onto Array Structures

• Parallel Algorithm Expressions
• Canonical Mapping Methodology
• Generalized Mapping

7. Programmable Signal Processors

• Important Features
• DSP Processors for Mobile and Wireless Communications
• Processors for Multidimensional Signal Processing

8. Optional Topics

• DSP Design Using VLIW Architectures
• Reconfigurable Computing Using FPGA
• Advanced Multimedia Applications

Course Grade

Homework:   15%

Paper:          15% 

Midterm:       35%

Final:            35%

Paper

Each student is expected to write a paper (no more than 15 typewritten pages) covering a signal processing application that requires the use of a custom or semi-custom VLSI hardware or a DSP. The purpose of the paper is to supplement the methodologies covered in the lectures with specific signal processing applications. Each paper is supposed to contain the following three elements:

• A brief description of a signal processing computation and its relevance to some specific applications.
• Computational requirements of this signal processing function.
• Current practices or proposed schemes for performing this function, including a brief description of the type of hardware/software used.

Proposals covering item 1. and a preliminary list of references are due on February 28, 2008.

Final papers are due on May 6, 2008.

Course Schedule

Meeting Time:  Tu,Th 11-12:15

Midterm:  March 13, in class

Final:     Thursday, May 15, 8-10am

Contact Information

  Assignments

Assignment#1: Chapter 3, Problems 3,7,8,9,10,     Due: Feb 14      Solutions

Assignment#2: Chapter 2, Problems 1,3,4,6,          Due: Feb 21       Solutions

Assignment#3: Chapter 4, Problems 2,3,5,9,12,     Due: March 6     Solutions

Assignment#4: Chapter 5, Problems 5,7,8,11,16    Due: March 11  Solutions

 Assignment#5: Chapter 7, Problems 1,9,10,15      Due: April 10      Solutions

Assignment#6: Write a 5-page (excluding figures) summary describing the main

features of recent programmable DSPs. Group the architectures under the following

categories: Enhanced Harvard; VLIW; and Parallel/multicore.

Due: May 1

Additional Reading

Recent DSP Processors

VLIW-TMS320C6x

Multiprocessor-TMS320C8x

FPGA Systems - Survey

FPGAs for Signal Processing